1. Field of the Invention
The present invention relates to processing condition determining methods and apparatuses, display methods and apparatuses, processing apparatuses, measurement apparatuses and exposure apparatuses, substrate processing systems, and programs and information recording media, and more particularly, to a processing condition determining method and a processing condition determining apparatus that determine a processing condition with respect to a pattern that is formed and layered on an object in each process, a display method and display apparatus that display a processing condition with respect to a pattern that is formed and layered on an object in each process, a processing apparatus that is equipped with the processing condition determining apparatus or the display apparatus, a measurement apparatus and an exposure apparatus, a substrate processing system that is equipped with the processing apparatus, the measurement apparatus, the exposure apparatus and the like, and a program that realizes the processing condition determining method or the display method and an information recording medium that stores the program.
2. Description of the Background Art
In a device manufacturing process in which circuit patterns are overlaid layer by layer on a substrate, overlay accuracy and linewidth accuracy of the circuit pattern of each layer need to be maintained at a high level, and to manage these accuracies appropriately is an important subject. In order to manage the overlay and the linewidth, preceding exposure to a test wafer prior to an actual process, measurement of overlay error and linewidth error in the exposure result, and adjustment of alignment-related parameters and control system parameters related to exposure dose, synchronous accuracy and focus control in an exposure apparatus based on the measurement result were performed in conventional methods.
In general, management of the overlay is performed only using either one of layers that have been formed so far (which is different depending on each coordinate axis in some cases) as a reference, and management of the linewidth is performed independently for each layer. In such a case, a permissible level of overlay error needs to be set extremely strict for every layer so that a device as a whole is prevented from being defective even if transfer positions of device patterns are gradually deviated in one direction as the device patterns are layered. However, under the management described above, despite the fact that a permissible level of overlay error varies from layer to layer, alignment stricter than necessary was performed for layers for which a permissible degree of overlay error was relatively low.
Further, a device pattern of each layer has electrical link with a plurality of layers via a contact hole or the like in many cases, and in such cases, management with respect to either one of the layers is insufficient.